1. Field of the Invention
The disclosures herein generally relate to voltage control circuits, and particularly relate to a voltage control circuit that controls voltage by charging and discharging a condenser.
2. Description of the Related Art
For the purpose of suppressing an unpleasant sound (referred to as pop sound or crackle sound) occurring upon power-on/off of an audio amplifier, it is sometimes necessary to provide a genteel voltage change at the input of the amplifier while avoiding a sudden voltage change. To this end, charging/discharging is performed with respect to a condenser, and the voltage appearing at the ends of the condenser is often used as a voltage source. Alternatively, the voltage appearing at the ends of the condenser is amplified by an amplifier for use as a voltage source.
FIG. 1 is a drawing showing an example of the configuration of a related-art pop-sound suppressing circuit utilizing the charging/discharging of a condenser. A pop-sound suppressing circuit 10 shown in FIG. 1 includes an amplifier 11, a speaker 12, a condenser 13 having capacitance C1, a condenser 14 having capacitance C2, a resistor 15 having resistance R1, a resistor 16 having resistance R2, a resistor 17 having resistance R3, a switch 18, a switch 19, a constant voltage source 20 for providing a signal ground SG, an audio signal source 21, a control circuit 22, and an oscillating circuit 23.
FIG. 2 is a drawing showing signal waveforms illustrating the operation of the pop-sound suppressing circuit 10 shown in FIG. 1. The signals having waveforms illustrated in FIG. 2 are identified in FIG. 1 by their signal names to indicate which signals in the circuit of FIG. 1 correspond to the signals shown in FIG. 2. In the following, a description will be given of the operation of the pop-sound suppressing circuit 10 of FIG. 1 by referring to FIG. 2.
A clock signal CK supplied from the oscillating circuit 23 to the control circuit 22 is active at all times during the period shown in FIG. 2, i.e., is alternating between HIGH and LOW (although not so illustrated in FIG. 2). For the sake of convenience of illustration, two straight lines on the row for the clock signal CK are intended to indicate such an active state in FIG. 2.
The control circuit 22 enables an activation signal PDA of the amplifier 11 at timing t0. In the example shown in FIG. 2, the activation signal PDA is HIGH in the enabled state, so that the amplifier 11 operates during the period in which the activation signal PDA is HIGH. At this timing, a switch control signal S1 generated by the control circuit 22 is LOW, so that the switch 18 is connected to the constant voltage source 20 (i.e., placed in the switching state as illustrated in FIG. 1). At this timing, also, a switch control signal S2 generated by the control circuit 22 is LOW, so that the switch 19 is connected to the ground (i.e., placed in the switching state as illustrated in FIG. 1).
At timing t0, thus, voltage signals V1 and V2 are zero. No electric charge is stored in the condenser 14, so that the non-inverted input (+) of the amplifier 11 is set to the ground potential. The inverted input (−) of the amplifier 11 is set to the signal ground SG that is a reference potential for audio signals. Further, a voltage signal V3 output from the amplifier 11 and a voltage signal V4 input into the speaker 12 are both set to the ground potential. In general, the signal ground potential SG is approximately ½ of the power supply voltage.
At next timing t1, the control circuit 22 changes the control signal S2 for the switch 19 to HIGH, thereby connecting the switch 19 to the potential SG of the constant voltage source 20. As a result, the voltage signal V1 is set to SG to start charging the condenser 14, resulting in a gradual increase in the voltage signal V2. In the end, the voltage signal V2 reaches the voltage SG at timing t3.
With resistance R1 of the resistor 15 equal to resistance R2 of the resistor 16, the amplification factor is 2 with respect to the non-inverted input of the amplifier 11. Accordingly, the output V3 of the amplifier 11 is equal to the ground potential until the non-inverted input V2 reaches ½ of SG at timing t2, and then gradually increases after t2. In the end, the output V3 reaches the voltage SG at timing t3 in the same manner as V2.
Here, the following representation is used.V2=SG[1−e−t/(R3·C2)]Since timing t2 is the timing at which the non-inverted input V2 becomes ½ of SG, t2-t1 is nearly equal to R3×C2×0.69. Based on the assumption that timing t3 is the timing at which the potential of the non-inverted input V2 becomes 99.9% of SG, t3-t1 is nearly equal to R3×C2×6.9.
The input terminal of the speaker 12 receives a flow of an electric current for charging the condenser 13 while the amplifier output voltage V3 is increasing. As a result, the voltage V4 at the input terminal of the speaker 12 increases. This potential increase is genteel as shown in FIG. 2, so that the sound generated by the speaker 12 is outside the audible frequency band, and is not perceived as an unpleasant noise.
After the output V3 of the amplifier 11 reaches SG in this manner, the control circuit 22 changes the switch control signal S1 to HIGH at timing t4. This results in the switch 18 being connected to the audio signal source 21, so that the audio signals are supplied to the inverted input of the amplifier 11. The speaker 12 thus generates sounds responsive to the audio signals.
At the time of switching off the circuit, the control circuit 22 changes the control signal S1 to LOW at timing t5, thereby changing the connection of the switch 18 from connection to the audio signal source 21 to connection to the signal ground SG of the constant voltage source 20. At next timing t6, the control circuit 22 changes the control signal S2 to LOW, thereby changing the connection of the switch 19 from connection to the signal ground SG to connection to the ground. As a result, the voltage signal V1 is set to the ground, and the potential V2 is set toV2=SG·e−t/(R3·C2).The electric charge accumulated in the condenser 14 is thus discharged according to the time constant defined by R3 and C2. At timing t8, the potential V2 reaches the ground potential. Timing t7 shown in FIG. 2 indicates the timing at which the potential V2 serving as the non-inverted input of the amplifier 11 is set to ½ of SG. In the same manner as above, t7-t6 is nearly equal to R3×C2×0.69, and t8-t6 is nearly equal to R3×C2×6.9.
The input terminal of the speaker 12 provides a flow of an electric current for discharging the condenser 13, which is opposite to what happened at the time of power-on. As a result, the voltage V4 at the input terminal of the speaker 12 drops. This potential drop is genteel as shown in FIG. 2, so that the sound generated by the speaker 12 is outside the audible frequency band, and is not perceived as an unpleasant noise. Thereafter, the control circuit 22 disables the activation signal PDA at timing t9, thereby stopping the operation of the amplifier 11.
In the operations described above, the time constant may fluctuate due to the variation of resistance R3 of the resistor 17 and capacitance C2 of the condenser 14. In order for the circuit to properly operate even when the time constant becomes the maximum due to the fluctuation, the control operation of the control circuit 22 needs to be designed such as to ensure that timing t4 is always later than timing t3 and timing t9 is always later than timing t7.
As can be seen from FIG. 2, the activation time t3-t2 of the amplifier 11 is shorter than the deactivation time t7-t6 when activation and deactivation are performed according to the time constant defined by R3 and C2. Based on the assumption that the deactivation time is 100 ms, t4-t3=t3-t1, and t9-t8=t8-t6, the amplifier activation time, the amplifier deactivation time, the activation control time, and the deactivation control time are calculated as follows:                Amplifier Activation Time T3−T2=897 ms;        Amplifier Deactivation Time T7−T6=100 ms;        Activation Control Time T4−T1=1993 ms; and        Deactivation Control Time T9−T6=1993 ms.        
When such resistance-and-condenser-based charging/discharging is used for the control purpose, it takes a lengthy time to completely charge/discharge the condenser. Because of this, the entirety of the activation and deactivation control time becomes extremely long relative to the amplifier activation time and deactivation time. Consequently, the problem arises that the activation and deactivation of the apparatus become slow, and also that power consumption increases.
Accordingly, there is a need for a voltage control circuit that uses a condenser to rapidly activate and deactivate a target circuit such as an amplifier.
[Patent Document 1] Japanese Patent Application Publication No. 53-87156
[Patent Document 2] Japanese Patent Application Publication No. 2004-15154